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/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */ #ifndef __ABI_MACH_T234_POWERGATE_T234_H_ #define __ABI_MACH_T234_POWERGATE_T234_H_ #define TEGRA234_POWER_DOMAIN_OFA 1U #define TEGRA234_POWER_DOMAIN_AUD 2U #define TEGRA234_POWER_DOMAIN_DISP 3U #define TEGRA234_POWER_DOMAIN_PCIEX8A 5U #define TEGRA234_POWER_DOMAIN_PCIEX4A 6U #define TEGRA234_POWER_DOMAIN_PCIEX4BA 7U #define TEGRA234_POWER_DOMAIN_PCIEX4BB 8U #define TEGRA234_POWER_DOMAIN_PCIEX1A 9U #define TEGRA234_POWER_DOMAIN_XUSBA 10U #define TEGRA234_POWER_DOMAIN_XUSBB 11U #define TEGRA234_POWER_DOMAIN_XUSBC 12U #define TEGRA234_POWER_DOMAIN_PCIEX4CA 13U #define TEGRA234_POWER_DOMAIN_PCIEX4CB 14U #define TEGRA234_POWER_DOMAIN_PCIEX4CC 15U #define TEGRA234_POWER_DOMAIN_PCIEX8B 16U #define TEGRA234_POWER_DOMAIN_MGBEA 17U #define TEGRA234_POWER_DOMAIN_MGBEB 18U #define TEGRA234_POWER_DOMAIN_MGBEC 19U #define TEGRA234_POWER_DOMAIN_MGBED 20U #define TEGRA234_POWER_DOMAIN_ISPA 22U #define TEGRA234_POWER_DOMAIN_NVDEC 23U #define TEGRA234_POWER_DOMAIN_NVJPGA 24U #define TEGRA234_POWER_DOMAIN_NVENC 25U #define TEGRA234_POWER_DOMAIN_VI 28U #define TEGRA234_POWER_DOMAIN_VIC 29U #define TEGRA234_POWER_DOMAIN_PVA 30U #define TEGRA234_POWER_DOMAIN_DLAA 32U #define TEGRA234_POWER_DOMAIN_DLAB 33U #define TEGRA234_POWER_DOMAIN_CV 34U #define TEGRA234_POWER_DOMAIN_GPU 35U #define TEGRA234_POWER_DOMAIN_NVJPGB 36U #endif