| Server IP : 54.233.248.239 / Your IP : 172.28.1.13 Web Server : Apache System : Linux ip-172-28-29-189 6.5.0-1014-aws #14~22.04.1-Ubuntu SMP Thu Feb 15 15:27:06 UTC 2024 x86_64 User : www-data ( 33) PHP Version : 7.2.34-43+ubuntu22.04.1+deb.sury.org+1 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /usr/lib/modules/6.5.0-1014-aws/build/include/dt-bindings/reset/ |
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/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ /* * Copyright (c) 2022 MediaTek Inc. * Author: Runyang Chen <runyang.chen@mediatek.com> */ #ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186 #define _DT_BINDINGS_RESET_CONTROLLER_MT8186 /* TOPRGU resets */ #define MT8186_TOPRGU_INFRA_SW_RST 0 #define MT8186_TOPRGU_MM_SW_RST 1 #define MT8186_TOPRGU_MFG_SW_RST 2 #define MT8186_TOPRGU_VENC_SW_RST 3 #define MT8186_TOPRGU_VDEC_SW_RST 4 #define MT8186_TOPRGU_IMG_SW_RST 5 #define MT8186_TOPRGU_DDR_SW_RST 6 #define MT8186_TOPRGU_INFRA_AO_SW_RST 8 #define MT8186_TOPRGU_CONNSYS_SW_RST 9 #define MT8186_TOPRGU_APMIXED_SW_RST 10 #define MT8186_TOPRGU_PWRAP_SW_RST 11 #define MT8186_TOPRGU_CONN_MCU_SW_RST 12 #define MT8186_TOPRGU_IPNNA_SW_RST 13 #define MT8186_TOPRGU_WPE_SW_RST 14 #define MT8186_TOPRGU_ADSP_SW_RST 15 #define MT8186_TOPRGU_AUDIO_SW_RST 17 #define MT8186_TOPRGU_CAM_MAIN_SW_RST 18 #define MT8186_TOPRGU_CAM_RAWA_SW_RST 19 #define MT8186_TOPRGU_CAM_RAWB_SW_RST 20 #define MT8186_TOPRGU_IPE_SW_RST 21 #define MT8186_TOPRGU_IMG2_SW_RST 22 #define MT8186_TOPRGU_SW_RST_NUM 23 /* MMSYS resets */ #define MT8186_MMSYS_SW0_RST_B_DISP_DSI0 19 /* INFRA resets */ #define MT8186_INFRA_THERMAL_CTRL_RST 0 #define MT8186_INFRA_PTP_CTRL_RST 1 #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */